Procédé d'inspection de dispositif de circuits intégrés à semi-conducteurs et dispositif de circuits intégrés à semi-conducteurs

Semiconductor integrated circuit device inspection method and semiconductor integrated circuit device

Inspektionsverfahren für integrierte halbleiterschaltvorrichtungen und integrierte halbleiterschaltvorrichtung

Abstract

Integrated circuit layers 10, 20 to be stacked on top of each other are formed with a plurality of inspection rectifier device units 15, 25, respectively. The plurality of inspection rectifier device units 15 (25) including rectifier devices 15a, 15b (25a, 25b) are connected between a plurality of connection terminals 14 (24) and a positive power supply lead 13a (23a) and a grounding lead 13b (23b) and emit light in response to a current. After electrically connecting the plurality of connection terminals 14, 24 to each other, a bias voltage is applied between the positive power supply lead 13a (or grounding lead 13b) and the grounding lead 23b (or positive power supply lead 23a), and the connection state between the connection terminals 14, 24 is inspected according to a light emission of the inspection rectifier device unit 15 or 25. This makes it possible to inspect, in a short time every time a layer is stacked, whether or not an interlayer connection failure exists in a semiconductor integrated circuit device constructed by stacking a plurality of integrated circuit layers in their thickness direction.

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